FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis

Firas Abdul Ghani; Ercan Kalali; Ilker Hamzaoglu

doi:10.1109/DTIS.2016.7483883

FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis

Firas Abdul Ghani, Ercan Kalali, Ilker Hamzaoglu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)
Publisher	Institute of Electrical and Electronics Engineers
Number of pages	4
ISBN (Electronic)	978-1-5090-0336-5
DOIs	https://doi.org/10.1109/DTIS.2016.7483883
Publication status	Published - 2 Jun 2016
Externally published	Yes
Event	2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016 - Istanbul, Turkey Duration: 12 Apr 2016 → 14 Apr 2016

Conference

Conference	2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016
Abbreviated title	DTIS
Country/Territory	Turkey
City	Istanbul
Period	12/04/16 → 14/04/16

Keywords

HEVC
Sub-pixel interpolation
high-level synthesis
FPGA

Access to Document

10.1109/DTIS.2016.7483883

Cite this

@inproceedings{2feae73ddc7f4273b465900eb50386d2,

title = "FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis",

keywords = "HEVC, Sub-pixel interpolation, high-level synthesis, FPGA",

author = "Ghani, {Firas Abdul} and Ercan Kalali and Ilker Hamzaoglu",

year = "2016",

month = jun,

day = "2",

doi = "10.1109/DTIS.2016.7483883",

language = "English",

booktitle = "2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, DTIS ; Conference date: 12-04-2016 Through 14-04-2016",

}

Ghani, FA, Kalali, E & Hamzaoglu, I 2016, FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis. in 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)., 7483883, Institute of Electrical and Electronics Engineers, 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, Istanbul, Turkey, 12/04/16. https://doi.org/10.1109/DTIS.2016.7483883

FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis. / Ghani, Firas Abdul; Kalali, Ercan; Hamzaoglu, Ilker.
2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS). Institute of Electrical and Electronics Engineers, 2016. 7483883.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis

AU - Ghani, Firas Abdul

AU - Kalali, Ercan

AU - Hamzaoglu, Ilker

PY - 2016/6/2

Y1 - 2016/6/2

KW - HEVC

KW - Sub-pixel interpolation

KW - high-level synthesis

KW - FPGA

U2 - 10.1109/DTIS.2016.7483883

DO - 10.1109/DTIS.2016.7483883

M3 - Conference contribution

BT - 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)

PB - Institute of Electrical and Electronics Engineers

T2 - 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016

Y2 - 12 April 2016 through 14 April 2016

ER -