FPGA Implementations of HEVC Inverse DCT Using High-Level Synthesis

Ercan Kalali; Ilker Hamzaoglu

doi:10.1109/DASIP.2015.7367262

FPGA Implementations of HEVC Inverse DCT Using High-Level Synthesis

Ercan Kalali, Ilker Hamzaoglu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	2015 Conference on Design and Architectures for Signal and Image Processing (DASIP)
Publisher	Institute of Electrical and Electronics Engineers
Number of pages	6
ISBN (Electronic)	978-1-4673-7738-6
DOIs	https://doi.org/10.1109/DASIP.2015.7367262
Publication status	Published - 4 Jan 2016
Externally published	Yes
Event	9th Conference on Design and Architectures for Signal and Image Processing, DASIP 2015 - AGH University of Science and Technology, Kracow, Poland Duration: 23 Sept 2015 → 25 Sept 2015 Conference number: 9

Conference

Conference	9th Conference on Design and Architectures for Signal and Image Processing, DASIP 2015
Abbreviated title	DASIP 2015
Country/Territory	Poland
City	Kracow
Period	23/09/15 → 25/09/15

Keywords

HEVC
IDCT
FPGA
high-level synthesis

Access to Document

10.1109/DASIP.2015.7367262

Cite this

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title = "FPGA Implementations of HEVC Inverse DCT Using High-Level Synthesis",

keywords = "HEVC, IDCT, FPGA, high-level synthesis",

author = "Ercan Kalali and Ilker Hamzaoglu",

year = "2016",

month = jan,

day = "4",

doi = "10.1109/DASIP.2015.7367262",

language = "English",

booktitle = "2015 Conference on Design and Architectures for Signal and Image Processing (DASIP)",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "9th Conference on Design and Architectures for Signal and Image Processing, DASIP 2015, DASIP 2015 ; Conference date: 23-09-2015 Through 25-09-2015",

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Kalali, E & Hamzaoglu, I 2016, FPGA Implementations of HEVC Inverse DCT Using High-Level Synthesis. in 2015 Conference on Design and Architectures for Signal and Image Processing (DASIP)., 7367262, Institute of Electrical and Electronics Engineers, 9th Conference on Design and Architectures for Signal and Image Processing, DASIP 2015, Kracow, Poland, 23/09/15. https://doi.org/10.1109/DASIP.2015.7367262

FPGA Implementations of HEVC Inverse DCT Using High-Level Synthesis. / Kalali, Ercan; Hamzaoglu, Ilker.
2015 Conference on Design and Architectures for Signal and Image Processing (DASIP). Institute of Electrical and Electronics Engineers, 2016. 7367262.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - FPGA Implementations of HEVC Inverse DCT Using High-Level Synthesis

AU - Kalali, Ercan

AU - Hamzaoglu, Ilker

N1 - Conference code: 9

PY - 2016/1/4

Y1 - 2016/1/4

KW - HEVC

KW - IDCT

KW - FPGA

KW - high-level synthesis

U2 - 10.1109/DASIP.2015.7367262

DO - 10.1109/DASIP.2015.7367262

M3 - Conference contribution

BT - 2015 Conference on Design and Architectures for Signal and Image Processing (DASIP)

PB - Institute of Electrical and Electronics Engineers

T2 - 9th Conference on Design and Architectures for Signal and Image Processing, DASIP 2015

Y2 - 23 September 2015 through 25 September 2015

ER -