Formal verification of a deadlock detection algorithm

F. Verbeek, J. Schmaltz

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Abstract

    Deadlock detection is a challenging issue in the analysis and design of on-chip networks. We have designed an algorithm to detect deadlocks automatically in on-chip networks with wormhole switching. The algorithm has been specified and proven correct in ACL2. To enable a top-down proof methodology, some parts of the algorithm have been left unimplemented. For these parts, the ACL2 specification contains constrained functions introduced with defun-sk. We used single-threaded objects to represent the data structures used by the algorithm. In this paper, we present details on the proof of correctness of the algorithm. The process of formal verification was crucial to get the algorithm flawless. Our ultimate objective is to have an efficient executable, and formally proven correct implementation of the algorithm running in ACL2.
    Original languageEnglish
    Title of host publicationProceedings 10th International Workshop on the ACL2 Theorem Prover and its Applications (ACL2 2011, Austin TX, USA, November 3-4, 2011)
    EditorsD.S. Hardin, J. Schmaltz
    PublisherEPTCS
    Pages103-112
    DOIs
    Publication statusPublished - 2011

    Publication series

    NameElectronic Proceedings in Theoretical Computer Science
    Volume70
    ISSN (Print)2075-2180

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