Fault tolerant logic by error correcting codes

N.F. Benschop, Richard Kleihorst, R.J. Vleuten, van der, G. Bruin - Muurling, J. Simonis

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    A method for error correction in integrated circuit (IC) implementations of Boolean functions is described. Additional logic, implementing error correcting codes known from channel coding, corrects both 'hard' manufacturing errors and 'soft' temporary errors. Experimental results are presented, with code optimization based on a fast algorithm for Boolean symmetry analysis. Apart from the well known majority voting (triplication), Hammin-and Product codes are described, having an implementation overhead much less than for maority voting.
    Original languageEnglish
    Title of host publicationAssociative Digital Network Theory - An Associative Algebra Approach to Logic, Arithmetic and State Machines
    EditorsN.F. Benschop
    Place of PublicationBerlin
    ISBN (Print)978-1402098284
    Publication statusPublished - 2009


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