Fault mode circuits

M. Badaroglu (Inventor), E.J. Marinissen (Inventor), P. Marchal (Inventor)

Research output: PatentPatent publication

Abstract

A test circuit and method for testing through-silicon-vias (TSVs) in three-dimensional integrated circuits (ICs) during each phase of manufacturing is disclosed. In one aspect, the method includes testing for faults in each individual TSV, TSV-under-test, shorts between a TSV-under-test, and TSVs in close proximity and for connections between the TSV-under-test and another tier in the ICs. A test circuit has three switchable current paths connected to a power supply via a pull-up resistor and switches: a calibration path, a short path, and a current measurement path. A power supply is connected to the measurement path, and the calibration path and the short path are connected to ground via respective pull-down resistors. For each TSV-under-test, the desired operation mode is selected by the closure of different combinations of switches.; The current flowing through the pull-up resistor in each operation mode indicates whether the TSV-under-test has passed or failed the test.

Original languageEnglish
Patent numberUS2013002272
IPCG01R 31/ 02 A I
Priority date30/06/11
Publication statusPublished - 3 Jan 2013
Externally publishedYes

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