We present the design of 4 Application Specific Instruction Set Processors (8-bit, 32-bit, 64-bit and 128-bit ASIP) which provide typical 16-bit general instructions and accelerate a common cryptographic domain. The ASIPs support the following security services: data confidentiality, data authentication, data integrity and replay attack protection and their design is appropriate for wireless sensor networks. The corresponding software for each ASIP has been optimized in terms of clock cycles and memory accesses. We evaluate the 4 ASIPs in terms of performance, power consumption, energy dissipation and area occupation. When our most energy efficient design (128-bit ASIP) operates on AES-CCM-32 security mode at a clock frequency of 100 MHz, it dissipates 41.86 nJ achieving a maximum throughput of 21.76 Mbps, while at a lower clock frequency of 4.61 MHz, it achieves a throughput of 1 Mbps, a typical value in the WSN, and dissipates energy of 35.20 nJ. The corresponding area overhead, for 90nm technology, excluding the memories, is 34.3K NAND2 equivalents. Comparisons with other works are given.
|Title of host publication||2010 17th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)|
|Publication status||Published - 1 Dec 2010|