In this paper it is demonstrated how with simple techniques it is possible to obtain insight into the effects of minor hardware alterations on the behaviour of a central computing facility. In the case described here the disks and disk control units formed the bottleneck. However, the only allowable alterations were in core size and central processor speed. The practical solution was to use such alterations in such a way that seek overlap was exploited as good as possible.
Name | Memorandum COSOR |
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Volume | 8102 |
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ISSN (Print) | 0926-4493 |
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