Evaluation of Speed and Area of Clustered VLIW Processors.

A.S. Terechko; M. Garg; H. Corporaal

Evaluation of Speed and Area of Clustered VLIW Processors.

A.S. Terechko, M. Garg, H. Corporaal

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	Proceedings of the 18th Int. Conference on VLSI Design and the 4th Int. Conference on Embedded Systems Design
Publisher	IEEE Computer Society
Pages	557-563
ISBN (Print)	0-7695-2264-5
Publication status	Published - 2005
Event	18th International Conference on VLSI Design and the 4th International Conference on Embedded Systems Design, January 3-7, 2005, Kolkata, India - Kolkata, India Duration: 3 Jan 2005 → 7 Jan 2005

Conference

Conference	18th International Conference on VLSI Design and the 4th International Conference on Embedded Systems Design, January 3-7, 2005, Kolkata, India
Country/Territory	India
City	Kolkata
Period	3/01/05 → 7/01/05

Cite this

@inproceedings{7b6ec0508f9f4ef28d96a760c26cfe79,

title = "Evaluation of Speed and Area of Clustered VLIW Processors.",

author = "A.S. Terechko and M. Garg and H. Corporaal",

year = "2005",

language = "English",

isbn = "0-7695-2264-5",

pages = "557--563",

booktitle = "Proceedings of the 18th Int. Conference on VLSI Design and the 4th Int. Conference on Embedded Systems Design",

publisher = "IEEE Computer Society",

address = "United States",

note = "18th International Conference on VLSI Design and the 4th International Conference on Embedded Systems Design, January 3-7, 2005, Kolkata, India ; Conference date: 03-01-2005 Through 07-01-2005",

}

Terechko, AS, Garg, M & Corporaal, H 2005, Evaluation of Speed and Area of Clustered VLIW Processors. in Proceedings of the 18th Int. Conference on VLSI Design and the 4th Int. Conference on Embedded Systems Design. IEEE Computer Society, pp. 557-563, 18th International Conference on VLSI Design and the 4th International Conference on Embedded Systems Design, January 3-7, 2005, Kolkata, India, Kolkata, India, 3/01/05.

Evaluation of Speed and Area of Clustered VLIW Processors. / Terechko, A.S.; Garg, M.; Corporaal, H.

Proceedings of the 18th Int. Conference on VLSI Design and the 4th Int. Conference on Embedded Systems Design. IEEE Computer Society, 2005. p. 557-563.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Evaluation of Speed and Area of Clustered VLIW Processors.

AU - Terechko, A.S.

AU - Garg, M.

AU - Corporaal, H.

PY - 2005

Y1 - 2005

M3 - Conference contribution

SN - 0-7695-2264-5

SP - 557

EP - 563

BT - Proceedings of the 18th Int. Conference on VLSI Design and the 4th Int. Conference on Embedded Systems Design

PB - IEEE Computer Society

T2 - 18th International Conference on VLSI Design and the 4th International Conference on Embedded Systems Design, January 3-7, 2005, Kolkata, India

Y2 - 3 January 2005 through 7 January 2005

ER -