Future applications for embedded systems demand chip multiprocessor
designs to meet real-time deadlines. These multiprocessors
are increasingly becoming heterogeneous for reasons of cost and power.
Design space exploration (DSE) of application mapping becomes a major
design decision in such systems. The time spent in DSE becomes even
greater with multiple applications executing concurrently. Methods have
been proposed to automate generation of multiprocessor designs and
prototype them on FPGAs. However, only few are able to support heterogeneous
platforms. This is because heterogeneous processors require
different types of inter-processor communication interfaces. So when we
choose a different processor for a particular task, the communication infrastructure
of the processor also has to change. In this paper, we present
a module that integrates in a multiprocessor design generation flow and
allows heterogeneous platform generation. This module is area efficient
and fast. The DSE shows that up to 31% FPGA area can be saved when
heterogeneous design is used as compared to a homogeneous platform.
Moreover, the performance of the application also improves significantly.
|Title of host publication||Wireless networks, information processing and systems : international multi topic conference, IMTIC 2008 Jamshoro, Pakistan, April 11-12, 2008 : revised selected papers|
|Editors||D.M.A. Hussain, A.Q.K. Rajput, B.S. Chowdhry, Q. Gee|
|Place of Publication||Berlin|
|Number of pages||10|
|Publication status||Published - 2009|
|Name||Communications in Computer and Information Science Series|