Electro-thermal characterization of Through-Silicon Vias

Aida Todri-Sanial

doi:10.1109/EuroSimE.2014.6813859

Electro-thermal characterization of Through-Silicon Vias

Aida Todri-Sanial

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

4 Citations (Scopus)

Abstract

Through-Silicon Vias (TSVs) are the vertial vias that enable three-dimensional integration by providing shorter, faster and denser interconnects. In this work, we investigate their thermal properties and show that TSVs used for power and ground connections can suffer from high thermal dissipations, which can lead to reliability and timing errors. Due to nature of current flow on 3D ICs (i.e. from package to each tier), we show that the TSVs near the package tier endure high current flows and high temperatures which eventually lead to Joule heating and electromigration (EM) phenomena. Such analyses bring forth the importance of power- and thermal-aware TSV placement.

Original language	English
Title of host publication	2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014
Publisher	IEEE Computer Society
ISBN (Print)	9781479947904
DOIs	https://doi.org/10.1109/EuroSimE.2014.6813859
Publication status	Published - 2014
Externally published	Yes
Event	2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014 - Ghent, Belgium Duration: 7 Apr 2014 → 9 Apr 2014

Conference

Conference	2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014
Country/Territory	Belgium
City	Ghent
Period	7/04/14 → 9/04/14

Access to Document

10.1109/EuroSimE.2014.6813859

Cite this

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title = "Electro-thermal characterization of Through-Silicon Vias",

abstract = "Through-Silicon Vias (TSVs) are the vertial vias that enable three-dimensional integration by providing shorter, faster and denser interconnects. In this work, we investigate their thermal properties and show that TSVs used for power and ground connections can suffer from high thermal dissipations, which can lead to reliability and timing errors. Due to nature of current flow on 3D ICs (i.e. from package to each tier), we show that the TSVs near the package tier endure high current flows and high temperatures which eventually lead to Joule heating and electromigration (EM) phenomena. Such analyses bring forth the importance of power- and thermal-aware TSV placement.",

author = "Aida Todri-Sanial",

year = "2014",

doi = "10.1109/EuroSimE.2014.6813859",

language = "English",

isbn = "9781479947904",

booktitle = "2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014",

publisher = "IEEE Computer Society",

address = "United States",

note = "2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014 ; Conference date: 07-04-2014 Through 09-04-2014",

}

Todri-Sanial, A 2014, Electro-thermal characterization of Through-Silicon Vias. in 2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014., 6813859, IEEE Computer Society, 2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014, Ghent, Belgium, 7/04/14. https://doi.org/10.1109/EuroSimE.2014.6813859

Electro-thermal characterization of Through-Silicon Vias. / Todri-Sanial, Aida.
2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014. IEEE Computer Society, 2014. 6813859.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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PY - 2014

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N2 - Through-Silicon Vias (TSVs) are the vertial vias that enable three-dimensional integration by providing shorter, faster and denser interconnects. In this work, we investigate their thermal properties and show that TSVs used for power and ground connections can suffer from high thermal dissipations, which can lead to reliability and timing errors. Due to nature of current flow on 3D ICs (i.e. from package to each tier), we show that the TSVs near the package tier endure high current flows and high temperatures which eventually lead to Joule heating and electromigration (EM) phenomena. Such analyses bring forth the importance of power- and thermal-aware TSV placement.

AB - Through-Silicon Vias (TSVs) are the vertial vias that enable three-dimensional integration by providing shorter, faster and denser interconnects. In this work, we investigate their thermal properties and show that TSVs used for power and ground connections can suffer from high thermal dissipations, which can lead to reliability and timing errors. Due to nature of current flow on 3D ICs (i.e. from package to each tier), we show that the TSVs near the package tier endure high current flows and high temperatures which eventually lead to Joule heating and electromigration (EM) phenomena. Such analyses bring forth the importance of power- and thermal-aware TSV placement.

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U2 - 10.1109/EuroSimE.2014.6813859

DO - 10.1109/EuroSimE.2014.6813859

M3 - Conference contribution

AN - SCOPUS:84901403260

SN - 9781479947904

BT - 2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014

PB - IEEE Computer Society

T2 - 2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014

Y2 - 7 April 2014 through 9 April 2014

ER -

Electro-thermal characterization of Through-Silicon Vias

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