TY - JOUR
T1 - Elastic Half-Space Theory-Based Distributed-Press-Pack Packaging Technology for Power Module with Balanced Thermal Stress
AU - Chang, Yao
AU - Li, Chengmin
AU - Luo, Haoze
AU - Li, Wuhua
AU - Iannuzzo, Francesco
AU - He, Xiangning
AU - Chang, Yao
PY - 2021/8
Y1 - 2021/8
N2 - In this article, the distributed-press-pack (DPP) packaging technology is developed to achieve balanced thermal stress on the chips. Under the current lumped-press-pack (LPP) style, the mechanical stress distribution on the chips, which is inherently uneven and coupled with thermal stress distribution, can be described with elastic half-space theoretical model. By decentralizing the lumped pressing load and positioning the loads evenly, a matrix of clamping array is formulated, and the mechanical stress distribution is compared under different clamping ways. Then a 3×3 clamping method that meets the trade-off between the balanced stress distribution and the packaging cost is chosen. Meanwhile, the busbar and heatsinks are integrated to improve the power density of the power module. Finally, a DPP prototype is implemented. By varying the pressure around the chips and heating them, the thermal distribution between parallel chips inside the prototype is compared and the effect of the proposed elastic half-space theory-based DPP packaging technology on the thermal stress balance is verified.
AB - In this article, the distributed-press-pack (DPP) packaging technology is developed to achieve balanced thermal stress on the chips. Under the current lumped-press-pack (LPP) style, the mechanical stress distribution on the chips, which is inherently uneven and coupled with thermal stress distribution, can be described with elastic half-space theoretical model. By decentralizing the lumped pressing load and positioning the loads evenly, a matrix of clamping array is formulated, and the mechanical stress distribution is compared under different clamping ways. Then a 3×3 clamping method that meets the trade-off between the balanced stress distribution and the packaging cost is chosen. Meanwhile, the busbar and heatsinks are integrated to improve the power density of the power module. Finally, a DPP prototype is implemented. By varying the pressure around the chips and heating them, the thermal distribution between parallel chips inside the prototype is compared and the effect of the proposed elastic half-space theory-based DPP packaging technology on the thermal stress balance is verified.
KW - Packaging technology
KW - press-pack
KW - reliability
KW - thermal stress
UR - http://www.scopus.com/inward/record.url?scp=85111871230&partnerID=8YFLogxK
U2 - 10.1109/JESTPE.2020.2990208
DO - 10.1109/JESTPE.2020.2990208
M3 - Article
AN - SCOPUS:85111871230
SN - 2168-6777
VL - 9
SP - 3892
EP - 3903
JO - IEEE Journal of Emerging and Selected Topics in Power Electronics
JF - IEEE Journal of Emerging and Selected Topics in Power Electronics
IS - 4
M1 - 9078066
ER -