Efficient sensitivity-based capacitance modeling for systematic and random geometric variations

Y. Bi, P.J.A. Harpe, N.P. Meijs, van der

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

4 Citations (Scopus)

Abstract

This paper presents a highly efficient sensitivity-based method for capacitance extraction, which models both systematic and random geometric variations. This method is applicable for BEM-based Layout Parasitic Extraction (LPE) tools. It is shown that, with only one system solve, the nominal parasitic capacitances as well as its relative standard deviations caused by both systematic and random geometric variations can be obtained. The additional calculation for both variations can be done at a very modest computational time, which is negligible compared to that of the standard capacitance extraction without considering any variation. Specifically, using the proposed method, experiments and a case study have been analyzed to show the impact of the random variation on the capacitance for a real design
Original languageEnglish
Title of host publicationProceedings of the 2011 16th Asia and South Pacific Design Automation Conference (ASP-DAC), 25-28 January 2011, Yokohama, Japan
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages61-66
ISBN (Print)978-1-4244-7515-5
DOIs
Publication statusPublished - 2011

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    Bi, Y., Harpe, P. J. A., & Meijs, van der, N. P. (2011). Efficient sensitivity-based capacitance modeling for systematic and random geometric variations. In Proceedings of the 2011 16th Asia and South Pacific Design Automation Conference (ASP-DAC), 25-28 January 2011, Yokohama, Japan (pp. 61-66). Piscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ASPDAC.2011.5722262