Limit-cycle amplifiers have shown promising potentials for linear and efficient amplification of high crest-factor signals. In this paper, the efficiency of a class-D amplifier in a limit cycle loop has been evaluated for a random Gaussian input in terms of the input power level, limit cycle amplitude and output load admittance. Multisine representation of the Gaussian signal has been used to calculate the output power and power loss. Results are in good agreement with efficiency evaluations of a 65 nm CMOS voltage mode class-D amplifier.
|Title of host publication||Proceedings of the IEEE MTT-S International Microwave Symposium Digest 2009. MTT '09. 7-12 June 2009, Boston, Massachussetts|
|Place of Publication||Piscataway|
|Publisher||Institute of Electrical and Electronics Engineers|
|Publication status||Published - 2009|