Digital systems power management for high performance mixed signal platforms

A. Kapoor, C. Groot, G.V. Piqué, H. Fatemi, J. Echeverri, L. Sevat, M. Vertregt, M. Meijer, V. Sharma, Y. Pu, J.P. De Gyvez

Research output: Contribution to journalArticleAcademicpeer-review

17 Citations (Scopus)
2 Downloads (Pure)

Abstract

High performance mixed signal (HPMS) platforms require stringent overall system and subsystem performance. The ability to design ultra-low power systems is used in a wide range of platforms including consumer, mobile, identification, healthcare products and microcontrollers. In this paper we present an overview of low power design techniques, challenges and opportunities faced in an industrial research environment. The paper presents strategies on the deployment of low power techniques that span from power-performance optimization scenarios accounting for active and standby operation modes to the development of multi-core architectures suitable for low voltage operation.

Original languageEnglish
Article number6766281
Pages (from-to)961-975
Number of pages15
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume61
Issue number4
DOIs
Publication statusPublished - 2014

Keywords

  • Back biasing
  • clock tree synthesis (CTS)
  • low power
  • power gating
  • SRAM

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