Digital hardware resources for steering a nonlinear interference suppressor

E.J.G. Janssen, H. Habibi, D. Milosevic, P.G.M. Baltus, A.H.M. Roermund, van

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

3 Citations (Scopus)
1 Downloads (Pure)

Abstract

In this paper the requirements and resulting costs for the digital hardware are discussed to steer a nonlinear interference suppression circuit (NIS). This NIS circuit suppresses a strong unwanted RF blocker by exploiting a nonlinear transfer function in a radio receiver. Nonlinear transfer functions enable frequency-independent amplitude discrimination because they do not obey to the principle of superposition. Such an approach is considered because it can save considerable power and cost in the analog front-end of multi-radio devices. But, to this end an investment is required in the digital part of the system. The analysis in this paper leads to an estimated area consumption of 125k gates and 12k SRAM cells resulting in ˜0.25 mm2 and ˜100 µW/MHz if implemented in CMOS 65nm. Also the future development of the cost figures is analyzed.
Original languageEnglish
Title of host publicationProceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES), 24 - 26 May 2012, Warschau, Poland
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages133-138
ISBN (Print)978-1-4577-2092-5
Publication statusPublished - 2012
Event19th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2012), May 24-26, 2012, Warsaw, Poland - Warsaw, Poland
Duration: 24 May 201226 May 2012

Conference

Conference19th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2012), May 24-26, 2012, Warsaw, Poland
Country/TerritoryPoland
CityWarsaw
Period24/05/1226/05/12
OtherMIXDES 2012

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