Design of the basic building block of a high-speed flexible and modular pipelined ADC

A. Zanikopoulos; P.J.A. Harpe; J.A. Hegt; A.H.M. Roermund, van

doi:10.1109/ISCAS.2007.377885

Design of the basic building block of a high-speed flexible and modular pipelined ADC

A. Zanikopoulos, P.J.A. Harpe, J.A. Hegt, A.H.M. Roermund, van

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

Abstract

This paper presents the design procedure and performance of the basic building block of a Flexible/Modular pipelined ADC. We report the advantages of adopting a flexible ADC approach [1] and we comment on the performance range that can be covered by this. Targeting a sampling frequency range from 50MS/s to 500MS/s and an accuracy range from 8b to 12b, we present and justify our design decisions leading to the implementation of the adjustable basic building block. The principle idea is the use of circuitries that can fully benefit from the speed-power consumption trade-off, while maintaining the desired accuracy. We employ dynamic circuitry and furthermore propose a fully adjustable open-loop amplifier suitable for flexible ADC realizations. Finally, we present the accuracy results and power consumption estimations along with the size of the building block implemented in a CMOS 0.18µm technology.

Original language	English
Title of host publication	Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA
Place of Publication	Piscataway, New Jersey, USA
Publisher	Institute of Electrical and Electronics Engineers
Pages	3876-3879
ISBN (Print)	1-4244-0920-9
DOIs	https://doi.org/10.1109/ISCAS.2007.377885
Publication status	Published - 2007
Event	2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007) - New Orleans, United States Duration: 27 May 2007 → 30 May 2007 http://www.iscas2007.org/

Conference

Conference	2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007)
Abbreviated title	ISCAS 2007
Country/Territory	United States
City	New Orleans
Period	27/05/07 → 30/05/07
Internet address	http://www.iscas2007.org/

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10.1109/ISCAS.2007.377885

Cite this

Zanikopoulos, A., Harpe, P. J. A., Hegt, J. A., & Roermund, van, A. H. M. (2007). Design of the basic building block of a high-speed flexible and modular pipelined ADC. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA (pp. 3876-3879). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ISCAS.2007.377885

Zanikopoulos, A. ; Harpe, P.J.A. ; Hegt, J.A. et al. / Design of the basic building block of a high-speed flexible and modular pipelined ADC. Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA. Piscataway, New Jersey, USA : Institute of Electrical and Electronics Engineers, 2007. pp. 3876-3879

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title = "Design of the basic building block of a high-speed flexible and modular pipelined ADC",

abstract = "This paper presents the design procedure and performance of the basic building block of a Flexible/Modular pipelined ADC. We report the advantages of adopting a flexible ADC approach [1] and we comment on the performance range that can be covered by this. Targeting a sampling frequency range from 50MS/s to 500MS/s and an accuracy range from 8b to 12b, we present and justify our design decisions leading to the implementation of the adjustable basic building block. The principle idea is the use of circuitries that can fully benefit from the speed-power consumption trade-off, while maintaining the desired accuracy. We employ dynamic circuitry and furthermore propose a fully adjustable open-loop amplifier suitable for flexible ADC realizations. Finally, we present the accuracy results and power consumption estimations along with the size of the building block implemented in a CMOS 0.18µm technology.",

author = "A. Zanikopoulos and P.J.A. Harpe and J.A. Hegt and {Roermund, van}, A.H.M.",

year = "2007",

doi = "10.1109/ISCAS.2007.377885",

language = "English",

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booktitle = "Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007), ISCAS 2007 ; Conference date: 27-05-2007 Through 30-05-2007",

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Zanikopoulos, A, Harpe, PJA , Hegt, JA & Roermund, van, AHM 2007, Design of the basic building block of a high-speed flexible and modular pipelined ADC. in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA. Institute of Electrical and Electronics Engineers, Piscataway, New Jersey, USA, pp. 3876-3879, 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, Louisiana, United States, 27/05/07. https://doi.org/10.1109/ISCAS.2007.377885

Design of the basic building block of a high-speed flexible and modular pipelined ADC. / Zanikopoulos, A.; Harpe, P.J.A.; Hegt, J.A. et al.
Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA. Piscataway, New Jersey, USA: Institute of Electrical and Electronics Engineers, 2007. p. 3876-3879.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Harpe, P.J.A.

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AB - This paper presents the design procedure and performance of the basic building block of a Flexible/Modular pipelined ADC. We report the advantages of adopting a flexible ADC approach [1] and we comment on the performance range that can be covered by this. Targeting a sampling frequency range from 50MS/s to 500MS/s and an accuracy range from 8b to 12b, we present and justify our design decisions leading to the implementation of the adjustable basic building block. The principle idea is the use of circuitries that can fully benefit from the speed-power consumption trade-off, while maintaining the desired accuracy. We employ dynamic circuitry and furthermore propose a fully adjustable open-loop amplifier suitable for flexible ADC realizations. Finally, we present the accuracy results and power consumption estimations along with the size of the building block implemented in a CMOS 0.18µm technology.

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Zanikopoulos A, Harpe PJA , Hegt JA, Roermund, van AHM. Design of the basic building block of a high-speed flexible and modular pipelined ADC. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA. Piscataway, New Jersey, USA: Institute of Electrical and Electronics Engineers. 2007. p. 3876-3879 doi: 10.1109/ISCAS.2007.377885

Design of the basic building block of a high-speed flexible and modular pipelined ADC

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