Design of CMOS gated analog readout circuits for SPAD pixel arrays

Ekaterina Panina, Gian Franco Dalla Betta, Lucio Pancheri, David Stoppa

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

3 Citations (Scopus)

Abstract

Advanced microscopy applications such as Fluorescence Lifetime Imaging Microscopy (FLIM) require detectors possessing high detection efficiency of incident photons and high timing resolution at the same time. One of the emerging technologies in this field is based on Single-Photon Avalanche Diodes (SPADs) which can easily be integrated into arrays in conventional CMOS technologies, providing picosecond timing resolution at a low fabrication cost. The feasibility of in-pixel analog processing circuits to replace area-consuming digital readout circuits has been recently demonstrated. Without sacrificing counting accuracy, analog circuits contain a much lower number of transistors, making the pixel design compact. In this paper we present an analysis of two different analog readout circuits for compact SPAD pixels. The proposed analog counters offer sub-nanosecond gating capabilities and are therefore suitable for FLIM applications.

Original languageEnglish
Title of host publicationPRIME 2012; 8th Conference on Ph.D. Research in Microelectronics and Electronics
PublisherInstitute of Electrical and Electronics Engineers
Pages39-42
Number of pages4
ISBN (Electronic)9783800734429
Publication statusPublished - 2012
Externally publishedYes
Event8th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2012 - Aachen, Germany
Duration: 12 Jun 201215 Jun 2012

Publication series

NamePRIME 2012; 8th Conference on Ph.D. Research in Microelectronics and Electronics

Conference

Conference8th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2012
CountryGermany
CityAachen
Period12/06/1215/06/12

Keywords

  • CMOS
  • FLIM
  • Image sensor
  • SPAD

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