Poster : Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS

Z. Chen; H. Gao; A.R. van Dommele; D. Milosevic; P.G.M. Baltus

doi:10.1109/SCVT.2016.7797670

Poster : Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

3 Citations (Scopus)

6 Downloads (Pure)

Abstract

This paper presents a design of fully differential low-noise amplifier (LNA) used for 60 GHz low power wireless communication in 65 nm CMOS technology. The proposed LNA consists of an input stage employing capacitive cross-coupling technique and an gain stage using current-reuse techniques. The simulated amplifier achieves both input and output matching better than -15dB, a forward gain of 15 dB, a noise figure of 4.7 dB, an input IP3 of -14dBm and the power consumption is 5 mW. The author also proposed a simple design method based on "black box" approach, which can be used for low power LNA design.

Original language	English
Title of host publication	23rd IEEE Symposium on Communications and Vehicular Technology in the Benelux, 22 november 2016, Mons, Belgium
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	1-4
Number of pages	4
ISBN (Electronic)	978-1-5090-4361-3
ISBN (Print)	978-1-5090-4362-0
DOIs	https://doi.org/10.1109/SCVT.2016.7797670
Publication status	Published - 22 Nov 2016

Keywords

low power
LNA
capacitive cross coupling
60 GHz
current reuse

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10.1109/SCVT.2016.7797670

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Chen, Z., Gao, H., van Dommele, A. R., Milosevic, D., & Baltus, P. G. M. (2016). Poster : Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS. In 23rd IEEE Symposium on Communications and Vehicular Technology in the Benelux, 22 november 2016, Mons, Belgium (pp. 1-4). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/SCVT.2016.7797670

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title = "Poster : Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS",

abstract = "This paper presents a design of fully differential low-noise amplifier (LNA) used for 60 GHz low power wireless communication in 65 nm CMOS technology. The proposed LNA consists of an input stage employing capacitive cross-coupling technique and an gain stage using current-reuse techniques. The simulated amplifier achieves both input and output matching better than -15dB, a forward gain of 15 dB, a noise figure of 4.7 dB, an input IP3 of -14dBm and the power consumption is 5 mW. The author also proposed a simple design method based on {"}black box{"} approach, which can be used for low power LNA design.",

keywords = "low power, LNA, capacitive cross coupling, 60 GHz, current reuse",

author = "Z. Chen and H. Gao and \{van Dommele\}, A.R. and D. Milosevic and P.G.M. Baltus",

year = "2016",

month = nov,

day = "22",

doi = "10.1109/SCVT.2016.7797670",

language = "English",

isbn = "978-1-5090-4362-0 ",

pages = "1--4",

booktitle = "23rd IEEE Symposium on Communications and Vehicular Technology in the Benelux, 22 november 2016, Mons, Belgium",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Chen, Z, Gao, H, van Dommele, AR , Milosevic, D & Baltus, PGM 2016, Poster : Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS. in 23rd IEEE Symposium on Communications and Vehicular Technology in the Benelux, 22 november 2016, Mons, Belgium. Institute of Electrical and Electronics Engineers, Piscataway, pp. 1-4. https://doi.org/10.1109/SCVT.2016.7797670

Poster : Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS. / Chen, Z.; Gao, H.; van Dommele, A.R. et al.
23rd IEEE Symposium on Communications and Vehicular Technology in the Benelux, 22 november 2016, Mons, Belgium. Piscataway: Institute of Electrical and Electronics Engineers, 2016. p. 1-4.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Baltus, P.G.M.

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N2 - This paper presents a design of fully differential low-noise amplifier (LNA) used for 60 GHz low power wireless communication in 65 nm CMOS technology. The proposed LNA consists of an input stage employing capacitive cross-coupling technique and an gain stage using current-reuse techniques. The simulated amplifier achieves both input and output matching better than -15dB, a forward gain of 15 dB, a noise figure of 4.7 dB, an input IP3 of -14dBm and the power consumption is 5 mW. The author also proposed a simple design method based on "black box" approach, which can be used for low power LNA design.

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KW - capacitive cross coupling

KW - 60 GHz

KW - current reuse

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BT - 23rd IEEE Symposium on Communications and Vehicular Technology in the Benelux, 22 november 2016, Mons, Belgium

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

ER -

Poster : Design consideration of 60 GHz low power low-noise amplifier in 65 nm CMOS

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Keywords

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