With the steady increase of transistor counts and the increase of wafer sizes, design for manufacturability has assumed a major role in normal VLSI design procedures (1). VLSI systems need to be made inherently robust to defects during fabrication, particularly to spot defects that can occur at almost any stage during the manufac turing of the IC. Environmental manufacturing conditions are characterized by statistical data such as defect size distributions and defect densities. Naturally, the manufacturing conditions are meant to expose the level of dirtiness (cleanliness) existing in the silicon fab. The ability to foresee the effects of various possible spot defects on the circuit helps to create defect-tolerant designs. Two techniques will be explored in this presentation; these can be differentiated as physical-based and logical-based tech niques. The physical-based approach to be reviewed is known as "design rule relax ation." The idea behind this strategy is to relax spaces between patterns and to widen the width of the patterns to systematically reduce the amounts of the IC area where defects might be catastrophic. Physical design defect tolerance can be quantified by extracting the layout’s defect sensitivity. This figure of merit is a "defect-tolerance measure" inherent to the layout. In turn, yield estimates can be obtained by combining the IC defect sensitivity with the environmental conditions of the manufacturing line. General approaches for the reconfiguration (or repair) of homogeneous VLSI/WSI systems with redundancy are also analyzed. These are generalized ap proaches in the sense that they are not restricted to a particular technique for replacement/repair of defective components. The first approach is based on a de fect-driven technique that relates the number of defects to the complexity in the execution of the repair/reconfiguration approach. This relationship is explicitly used in the generation of the solution tree for the repair of the whole system. The second approach is based on a spare-driven technique in which defective compo nents with equal repair characteristics are grouped together as a single entity. The repair/reconfiguration process is then directed toward satisfying the characteristics of these groups.
|Title of host publication||Encyclopedia of computer science and technology, vol. 32|
|Editors||A. Kent, J.G. Williams|
|Place of Publication||Basel|
|Publisher||Marcel Dekker Inc.|
|Publication status||Published - 1997|