Defect-location identification for cell-aware test

Zhan Gao, Santosh Malagi, Erik Jan Marinissen, Joe Swenton, Jos Huisken, Kees Goossens

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

3 Citations (Scopus)

Abstract

Cell-aware test (CAT) explicitly targets defects inside library cells and therefore significantly reduces the amount of test escapes compared to conventional automatic test pattern generation (ATPG). Our CAT flow consists of three steps: (1) defect-location identification (DLI), (2) defect characterization based on
detailed analog simulation of the cells, and (3) cell-aware automatic test pattern generation (ATPG). This paper focuses on Step 1, as quality and cost are determined by the set of cell-internal defect locations considered in the remainder of the flow. Based on technology inputs from the user and a parasitic extraction (PEX) run that analyzes the cell layouts, we derive a set of open defects on and short defects between both transistor terminals and intra-cell interconnects. The full set of defect locations is stored for later use during failure analysis. Through dedicated DLI algorithms, we identify a compact subset of defect locations for defect characterization and ATPG, in which we include only
one representative defect location for each set of equivalent defects locations. For Cadence’s GPDK045 library, the compact subset contains only 2.8% of the full set of defect locations and reduces the time required for defect characterization with the same ratio.
Original languageEnglish
Title of host publicationLATS 2019 - 20th IEEE Latin American Test Symposium
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Number of pages6
ISBN (Electronic)9781728117560
DOIs
Publication statusPublished - 6 May 2019
Event20th IEEE Latin American Test Symposium, LATS 2019 - Santiago, Chile
Duration: 11 Mar 201913 Mar 2019

Conference

Conference20th IEEE Latin American Test Symposium, LATS 2019
CountryChile
CitySantiago
Period11/03/1913/03/19

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Keywords

  • cell-aware test
  • defect detection matrix
  • defects
  • equivalence
  • open
  • parasitic extraction
  • short

Cite this

Gao, Z., Malagi, S., Marinissen, E. J., Swenton, J., Huisken, J., & Goossens, K. (2019). Defect-location identification for cell-aware test. In LATS 2019 - 20th IEEE Latin American Test Symposium [8704561] Piscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/LATW.2019.8704561