Abstract
To provide a good balance between the performance and flexibility of future digital control platforms, we propose an FPGA-based heterogeneous multiprocessor approach, in which the platform is composed of processing elements from a set of parameterizable heterogeneous Application-Specific Instruction-set Processors (ASIPs), connected with an hierarchical interconnect. With a case-study treating two different industrial-scale controllers, we show that a platform generated from our template using only a small library of instantiable ASIP types outperforms an optimized 8-core general-purpose implementation by a factor 4.9 on sampling frequency and reduces IO-delay with 37.5%.
Original language | English |
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Title of host publication | Proceedings 16th Euromicro Conference on Digital Systems Design (DSD 2013), 4-6 September 2013, Santandor, Spain |
Editors | J. Silva Matos, F. Leporati |
Pages | 811-814 |
DOIs | |
Publication status | Published - 2013 |
Event | 16th Euromicro Conference on Digital System Design (DSD 2013) - Santander, Spain Duration: 4 Sept 2013 → 6 Sept 2013 http://www.teisa.unican.es/dsd-seaa-2013/dsd_2013/index.html%3Fq=node%252F15.html |
Conference
Conference | 16th Euromicro Conference on Digital System Design (DSD 2013) |
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Abbreviated title | DSD 2013 |
Country/Territory | Spain |
City | Santander |
Period | 4/09/13 → 6/09/13 |
Other | Conference co-located with the 39th Euromicro Conference on Software Engineering and Advanced Applications (SEAA 2013) |
Internet address |