Dataflow-based multi-ASIP platform approach for digital control applications

R.M.W. Frijns, A.L.J. Kamp, S. Stuijk, J.P.M. Voeten, M. Bontekoe, K.J.A. Gemei, H. Corporaal

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

2 Citations (Scopus)

Abstract

To provide a good balance between the performance and flexibility of future digital control platforms, we propose an FPGA-based heterogeneous multiprocessor approach, in which the platform is composed of processing elements from a set of parameterizable heterogeneous Application-Specific Instruction-set Processors (ASIPs), connected with an hierarchical interconnect. With a case-study treating two different industrial-scale controllers, we show that a platform generated from our template using only a small library of instantiable ASIP types outperforms an optimized 8-core general-purpose implementation by a factor 4.9 on sampling frequency and reduces IO-delay with 37.5%.
Original languageEnglish
Title of host publicationProceedings 16th Euromicro Conference on Digital Systems Design (DSD 2013), 4-6 September 2013, Santandor, Spain
EditorsJ. Silva Matos, F. Leporati
Pages811-814
DOIs
Publication statusPublished - 2013
Event16th Euromicro Conference on Digital System Design (DSD 2013) - Santander, Spain
Duration: 4 Sep 20136 Sep 2013
http://www.teisa.unican.es/dsd-seaa-2013/dsd_2013/index.html%3Fq=node%252F15.html

Conference

Conference16th Euromicro Conference on Digital System Design (DSD 2013)
Abbreviated titleDSD 2013
Country/TerritorySpain
CitySantander
Period4/09/136/09/13
OtherConference co-located with the 39th Euromicro Conference on Software Engineering and Advanced Applications (SEAA 2013)
Internet address

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