Critical points based register-concurrency autotuning for GPUs

A. Li, S.L. Song, A. Kumar, E.Z. Zhang, D. Chavarría-Miranda, H. Corporaal

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

16 Citations (Scopus)


The unprecedented prevalence of GPGPU is largely attributed to its abundant on-chip register resources, which allow massively concurrent threads and extremely fast context switch. However, due to internal memory size constraints, there is a tradeoff between the per-thread register usage and the overall thread concurrency. This becomes a design problem in terms of performance tuning, since the performance sweet spot which can be significantly affected by these two factors is generally unknown beforehand. In this paper, we propose an effective autotuning solution to quickly and efficiently select the optimal number of registers perthread for delivering the best GPU performance. Experiments on three generations of GPUs (Nvidia Fermi, Kepler and Maxwell) demonstrate that our simple strategy can achieve an average of 10% performance improvement while a max of 50% over the original version without modifying the user code. Additionally, to reduce local cache misses due to register spilling and further improve performance, we explore three optimization schemes (i.e. bypass L1 for global memory access, enlarge local L1 cache and spill into shared memory) and discuss their impact on performance on a Kepler GPU.

Original languageEnglish
Title of host publicationProceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Number of pages6
ISBN (Electronic)978-3-9815-3707-9
Publication statusPublished - 25 Apr 2016
Event19th Design, Automation and Test in Europe Conference and Exhibition (DATE 2016) - ICC, Dresden, Germany
Duration: 14 Mar 201618 Mar 2016
Conference number: 19


Conference19th Design, Automation and Test in Europe Conference and Exhibition (DATE 2016)
Abbreviated titleDATE 2016
Internet address


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