Cost modeling for 2.5D and 3D stacked ICs

Mottaqiallah Taouil, Said Hamdioui, Erik Jan Marinissen

Research output: Chapter in Book/Report/Conference proceedingChapterAcademicpeer-review

Abstract

This chapter discusses cost modeling for 2.5D/3D‐stacked integrated circuits (2.5D/3D‐SICs) and presents a tool that considers all costs involved in the whole production chain, including design, manufacturing, test, packaging, and logistics. The tool provides the estimated overall cost for 2.5D/3D‐SICs and its cost breakdown for a given input parameter set consisting of test flows, die yield, stack yield, etc. The chapter defines test flows and highlights the importance of testing. In order to determine the most cost‐effective test flow, test requirements should be specified. However, taking only the test cost into consideration is not sufficient to provide a fair evaluation and/or comparison; a test flow does not only impact test cost but also design and manufacturing cost. The chapter defines and classifies the different costs involved in designing and manufacturing 2.5D/3D‐SICs. It also presents the 3D‐COSTAR cost model. It shows the crucial importance of 3D‐COSTAR by analyzing trade‐offs for several test optimization problems.
Original languageEnglish
Title of host publicationHandbook of 3D integration
Subtitle of host publicationvolume 4: design, test, and thermal management
EditorsP.D. Franzon, E.J. Marinissen, M.S. Bakir
Place of PublicationWeinheim
PublisherWiley-VCH Verlag
Chapter9
Pages189-208
Number of pages20
ISBN (Print)978-3-527-33855-9
DOIs
Publication statusPublished - 8 Feb 2019

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    Taouil, M., Hamdioui, S., & Marinissen, E. J. (2019). Cost modeling for 2.5D and 3D stacked ICs. In P. D. Franzon, E. J. Marinissen, & M. S. Bakir (Eds.), Handbook of 3D integration: volume 4: design, test, and thermal management (pp. 189-208). Wiley-VCH Verlag. https://doi.org/10.1002/9783527697052.ch9