Converter-Free Power Delivery Using Voltage Stacking for Near/Subthreshold Operation

Kamlesh Singh (Corresponding author), Barry de Bruin, Hailong Jiao, Jos Huisken, Henk Corporaal, Jose Pineda de Gyvez

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3 Citations (Scopus)
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Integrated circuits operating in the near/subthreshold region offer low energy consumption. However, due to the constrained voltage scalability of SRAMs, efficient power delivery is difficult to achieve. A traditional implementation would require at least two distinct voltage supplies generated by possibly two power converters. In this article, a new implementation for near/subthreshold operation is presented. The proposed implementation consists of a new 'converter-free' design based on a three-level voltage stack operating at 1.8 V ± 5%. Here, the leakage current from the SRAMs in the top stack is recycled to sustain the near/subthreshold operation of the logic circuits in the two lower stacks. A test chip with the proposed voltage-stacking technique was implemented in a 28-nm low- Vth (LVT) fully depleted silicon on insulator (FDSOI) technology. The test chip is an ultralow-power advanced system-on-chip (SoC) consisting of an RISC-V core, a coarse-grained reconfigurable accelerator, and peripherals. The SoC uses a current sink and an adaptive body-bias controller for voltage regulation of the intermediate voltage rails between the stacks. The proposed system achieves up to 95% power delivery efficiency with negligible area overhead ( 1%). The silicon measurement shows that the system energy efficiency is improved by 1.6× on average, and the energy consumption is reduced by 37% on average compared to the flat implementation.

Original languageEnglish
Article number9405788
Pages (from-to)1039-1051
Number of pages13
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number6
Publication statusPublished - 1 Jun 2021

Bibliographical note

Publisher Copyright:


  • Adaptive body-biasing
  • charge recycling
  • current sink (CS)
  • Energy consumption
  • level-shifter
  • Rails
  • Random access memory
  • Silicon-on-insulator
  • Stacking
  • system efficiency
  • System-on-chip
  • ultralow power
  • Voltage control
  • voltage stacking.


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