Comparing techniques for proving unsatisfiability (extended abstract)

O. Tveretina, H. Zantema

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Abstract

We compare two standard techniques for satisfiability (SAT), which are basic for verification of microprocessor systems. We propose an approach for construction of shorter resolution refutations based on a standard approach called DPLL.
Original languageEnglish
Title of host publicationProceedings International Conference on Mathematical Methods in Electromagnetic Theory, MMET '02, Kiev, Ukraine, September 10-13, 2002
Place of PublicationPiscataway NJ
PublisherInstitute of Electrical and Electronics Engineers
Pages605-607
Volume2
ISBN (Print)0-7803-7391-X
DOIs
Publication statusPublished - 2002

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