TY - JOUR
T1 - Compact modeling of high-voltage LDMOS devices including quasi-saturation
AU - Aarts, A.C.T.
AU - Kloosterman, W.J.
PY - 2006
Y1 - 2006
N2 - The surface-potential-based compact transistor model, MOS Model 20 (MM20), has been extended with a quasi-saturation, an effect that is typical for LDMOS devices with a long drift region. As a result, MM20 extends its application range from low-voltage LDMOS devices up to high-voltage LDMOS devices of about 100V. In this paper, the new dc model of MM20, including quasi-saturation, is presented. The addition of velocity saturation in the drift region ensures the current to be controlled by either the channel region or the drift region. A comparison with dc measurements on a 60-V LDMOS device shows that the new model provides an accurate description in all regimes of operation, ranging from subthreshold to superthreshold, in both the linear and saturation regime. Thus, owing to the inclusion of quasi-saturation also the regime of high-gate and high-drain bias conditions for high-voltage LDMOS devices is accurately described.
AB - The surface-potential-based compact transistor model, MOS Model 20 (MM20), has been extended with a quasi-saturation, an effect that is typical for LDMOS devices with a long drift region. As a result, MM20 extends its application range from low-voltage LDMOS devices up to high-voltage LDMOS devices of about 100V. In this paper, the new dc model of MM20, including quasi-saturation, is presented. The addition of velocity saturation in the drift region ensures the current to be controlled by either the channel region or the drift region. A comparison with dc measurements on a 60-V LDMOS device shows that the new model provides an accurate description in all regimes of operation, ranging from subthreshold to superthreshold, in both the linear and saturation regime. Thus, owing to the inclusion of quasi-saturation also the regime of high-gate and high-drain bias conditions for high-voltage LDMOS devices is accurately described.
U2 - 10.1109/TED.2006.870423
DO - 10.1109/TED.2006.870423
M3 - Article
SN - 0018-9383
VL - 53
SP - 897
EP - 902
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 4
ER -