Code generation for reconfigurable explicit datapath architectures with LLVM

M. Adriaansen; M. Wijtvliet; R. Jordans; L. Waeijen; H. Corporaal

doi:10.1109/DSD.2016.88

Code generation for reconfigurable explicit datapath architectures with LLVM

M. Adriaansen, M. Wijtvliet, R. Jordans, L. Waeijen, H. Corporaal

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

1 Citation (Scopus)

10 Downloads (Pure)

Abstract

Good tool support is essential for computing platforms because they increase the programmability of the platform. This is especially the case for reconfigurable architectures because an application needs to be mapped on the architecture for each configuration individually. This paper investigates how the LLVM framework can be used to generate code for a Coarse Grained Reconfigurable Array (CGRA). A CGRA compiler must be retargetable to support all possible architecture configurations. The explicit bypassing capabilities of the hardware should be utilized. Utilizing the hardware features requires the compiler to support software pipelining, multiple register files and operation based scheduling. This paper evaluates the potential of the LLVM framework and identifies missing features for the support of reconfigurable explicit datapath architectures.

Original language	English
Title of host publication	2016 Euromicro Conference on Digital System Design (DSD)
Publisher	Institute of Electrical and Electronics Engineers
Pages	30-37
Number of pages	8
ISBN (Electronic)	978-1-5090-2817-7
DOIs	https://doi.org/10.1109/DSD.2016.88
Publication status	Published - 31 Aug 2016
Event	19th Euromicro Conference on Digital System Design (DSD 2016) - Limassol, Cyprus Duration: 31 Aug 2016 → 2 Sep 2016 Conference number: 19 http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016

Conference

Conference	19th Euromicro Conference on Digital System Design (DSD 2016)
Abbreviated title	DSD 2016
Country/Territory	Cyprus
City	Limassol
Period	31/08/16 → 2/09/16
Internet address	http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016

Keywords

Code generation
compilation
reconfigurable architectures
CGRA

Access to Document

10.1109/DSD.2016.88

Cite this

@inproceedings{80ac3b953e5a4fa688c0b5a1ceac666b,

title = "Code generation for reconfigurable explicit datapath architectures with LLVM",

abstract = "Good tool support is essential for computing platforms because they increase the programmability of the platform. This is especially the case for reconfigurable architectures because an application needs to be mapped on the architecture for each configuration individually. This paper investigates how the LLVM framework can be used to generate code for a Coarse Grained Reconfigurable Array (CGRA). A CGRA compiler must be retargetable to support all possible architecture configurations. The explicit bypassing capabilities of the hardware should be utilized. Utilizing the hardware features requires the compiler to support software pipelining, multiple register files and operation based scheduling. This paper evaluates the potential of the LLVM framework and identifies missing features for the support of reconfigurable explicit datapath architectures.",

keywords = "Code generation, compilation, reconfigurable architectures, CGRA",

author = "M. Adriaansen and M. Wijtvliet and R. Jordans and L. Waeijen and H. Corporaal",

year = "2016",

month = aug,

day = "31",

doi = "10.1109/DSD.2016.88",

language = "English",

pages = "30--37",

booktitle = "2016 Euromicro Conference on Digital System Design (DSD)",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "19th Euromicro Conference on Digital System Design (DSD 2016), DSD 2016 ; Conference date: 31-08-2016 Through 02-09-2016",

url = "http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016",

}

Adriaansen, M, Wijtvliet, M, Jordans, R , Waeijen, L & Corporaal, H 2016, Code generation for reconfigurable explicit datapath architectures with LLVM. in 2016 Euromicro Conference on Digital System Design (DSD). Institute of Electrical and Electronics Engineers, pp. 30-37, 19th Euromicro Conference on Digital System Design (DSD 2016), Limassol, Cyprus, 31/08/16. https://doi.org/10.1109/DSD.2016.88

Code generation for reconfigurable explicit datapath architectures with LLVM. / Adriaansen, M.; Wijtvliet, M.; Jordans, R. et al.

2016 Euromicro Conference on Digital System Design (DSD). Institute of Electrical and Electronics Engineers, 2016. p. 30-37.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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N2 - Good tool support is essential for computing platforms because they increase the programmability of the platform. This is especially the case for reconfigurable architectures because an application needs to be mapped on the architecture for each configuration individually. This paper investigates how the LLVM framework can be used to generate code for a Coarse Grained Reconfigurable Array (CGRA). A CGRA compiler must be retargetable to support all possible architecture configurations. The explicit bypassing capabilities of the hardware should be utilized. Utilizing the hardware features requires the compiler to support software pipelining, multiple register files and operation based scheduling. This paper evaluates the potential of the LLVM framework and identifies missing features for the support of reconfigurable explicit datapath architectures.

AB - Good tool support is essential for computing platforms because they increase the programmability of the platform. This is especially the case for reconfigurable architectures because an application needs to be mapped on the architecture for each configuration individually. This paper investigates how the LLVM framework can be used to generate code for a Coarse Grained Reconfigurable Array (CGRA). A CGRA compiler must be retargetable to support all possible architecture configurations. The explicit bypassing capabilities of the hardware should be utilized. Utilizing the hardware features requires the compiler to support software pipelining, multiple register files and operation based scheduling. This paper evaluates the potential of the LLVM framework and identifies missing features for the support of reconfigurable explicit datapath architectures.

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ER -

Code generation for reconfigurable explicit datapath architectures with LLVM

Abstract

Conference

Keywords

Access to Document

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Cite this