In this paper, we report an RF power amplifier design in digital CMOS technology for the Class 1 power level specification (20 dBm) in the Bluetooth Communications standard. We have also investigated hot carrier effects under large signal RF operation of the power amplifier. The two stage circuit, designed in 0.25 µn CMOS technology, utilizes a high-density ring capacitor structure for interstage matching. In a chip-on-board configuration tested at 2.4 GHz, this CMOS power amplifier delivers an output power of 24 dBm with 48% PAE at a supply voltage of 2.5V.
|Title of host publication||Proceeding of ICECS 2001, 18-20 Sept. 2001|
|Publication status||Published - 2001|
|Event||conference; ICECS 2001 - |
Duration: 1 Jan 2001 → …
|Conference||conference; ICECS 2001|
|Period||1/01/01 → …|