Abstract
In this paper, we report an RF power amplifier design in digital CMOS technology for the Class 1 power level specification (20 dBm) in the Bluetooth Communications standard. We have also investigated hot carrier effects under large signal RF operation of the power amplifier. The two stage circuit, designed in 0.25 μn CMOS technology, utilizes a high-density ring capacitor structure for interstage matching. In a chip-on-board configuration tested at 2.4 GHz, this CMOS power amplifier delivers an output power of 24 dBm with 48% PAE at a supply voltage of 2.5V.
| Original language | English |
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| Title of host publication | ESSCIRC 2001 |
| Subtitle of host publication | 27th European Solid-State Circuits Conference 18 – 20 September 2001 Villach, Austria |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 57-60 |
| Number of pages | 4 |
| Publication status | Published - 2001 |
| Event | 27th European Solid-State Circuits Conference, ESSCIRC 2001 - Villach, Austria Duration: 18 Sept 2001 → 20 Sept 2001 |
Conference
| Conference | 27th European Solid-State Circuits Conference, ESSCIRC 2001 |
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| Country/Territory | Austria |
| City | Villach |
| Period | 18/09/01 → 20/09/01 |