### Abstract

A method comprises sampling an input voltage signal, comparing the sampled input voltage signal with an output signal of a feedback DAC, and determining an (N+1) bit code representation for a comparison result, the (N+1) bit code yielding the N bit output signal. On detection of the (N+1) bit code being equal to a predefined calibration trigger code, performing a calibration for a most significant bit of the (N+1) bit code by replacing the (N+1) bit code by an alternative (N+1) bit code that yields the same N bit output signal, performing an additional comparison cycle using the alternative (N+1) bit code, determining, using comparison results of the additional comparison cycle and the preceding (N+1)th cycle, a sign of a DAC capacitor mismatch error, and tuning programmable binary scaled calibration capacitors in parallel to a capacitor corresponding to the one of the most significant bits of the (N+1) bit code.

Original language | English |
---|---|

Patent number | US9397679 B1 |

Priority date | 19/02/15 |

Publication status | Published - 19 Jul 2016 |

## Fingerprint Dive into the research topics of 'Circuit and method for DAC mismatch error detection and correction in an ADC'. Together they form a unique fingerprint.

## Cite this

Harpe, P. J. A. (2016). Circuit and method for DAC mismatch error detection and correction in an ADC. (Patent No.

*US9397679 B1*).