Checking metric temporal logic with TRACE

M. Hendriks, M.C.W. Geilen, A.R.B. Behrouzian, A.A. Basten, H. Alizadeh, D. Goswami

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

1 Citation (Scopus)

Abstract

Execution traces' time-stamped sequences of events' provide a general' domain-independent' view on the behavior of systems. They enable analysis of metrics such as latency' pipeline depth and throughput. Often' however' it is not clear what such metrics exactly mean and ad hoc methods are used to compute them. Metric Temporal Logic (MTL) can be used to address this issue: it enables the formal specification of quantitative properties on execution traces. We thus have added an MTL checking capability to the TRACE tool' which is a tool for viewing and analyzing execution traces [1]. We use a recursive memoization algorithm that generates concise explanations of the truth value of the given MTL formula. These explanations can be visualized in the TRACE viewer to aid interpretation by the user.

Original languageEnglish
Title of host publicationProceedings - 2016 16th International Conference on Application of Concurrency to System Design, ACSD 2016, 19-21 June 2016, Turan, Poland
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages19-24
Number of pages6
ISBN (Electronic)978-1-5090-2589-3
ISBN (Print)978-1-5090-0763-9
DOIs
Publication statusPublished - 3 Feb 2017
Event16th International Conference on Application of Concurrency to System Design (ACSD 2016) - Torun, Poland
Duration: 19 Jun 201621 Jun 2016
Conference number: 16
http://pn2016.mat.umk.pl/

Conference

Conference16th International Conference on Application of Concurrency to System Design (ACSD 2016)
Abbreviated titleACSD 2016
CountryPoland
CityTorun
Period19/06/1621/06/16
Internet address

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Keywords

  • execution trace
  • explanation
  • informative prefix
  • Metric temporal logic
  • visualization

Cite this

Hendriks, M., Geilen, M. C. W., Behrouzian, A. R. B., Basten, A. A., Alizadeh, H., & Goswami, D. (2017). Checking metric temporal logic with TRACE. In Proceedings - 2016 16th International Conference on Application of Concurrency to System Design, ACSD 2016, 19-21 June 2016, Turan, Poland (pp. 19-24). [7842497] Piscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ACSD.2016.13