Abstract
A novel approach to the SSR channel profile formation for MOSFETs is suggested, with dopant implantation in the late stages of the processing, with the gate, source/drain already in (`TGi'). Only a single damage/activation anneal and the back-end thermal budget are experienced by the implanted dopants, which results in steep profiles even when light boron ions are used. High-performance NMOS devices with excellent SCE control designed for low-voltage digital, analog and RF operation were realized using this technique. For PMOS the use of TGi is restricted by significant diffusion of source/drain extensions due to the TGi damage induced TED.
Original language | English |
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Title of host publication | 1998 IEEE International Electron Devices Meeting |
Place of Publication | Piscataway |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 635-638 |
Number of pages | 4 |
ISBN (Print) | 0-7803-4774-9 |
DOIs | |
Publication status | Published - 1 Dec 1998 |
Externally published | Yes |
Event | 1998 IEEE International Electron Devices Meeting, IEDM 1998 - San Francisco, United States Duration: 6 Dec 1998 → 9 Dec 1998 |
Conference
Conference | 1998 IEEE International Electron Devices Meeting, IEDM 1998 |
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Abbreviated title | IEDM 1998 |
Country/Territory | United States |
City | San Francisco |
Period | 6/12/98 → 9/12/98 |