TY - JOUR
T1 - Brownian-bridge-based statistical analysis of DAC INL caused by current mismatch
AU - Radulov, G.I.
AU - Heydenreich, M.O.
AU - Hofstad, van der, R.W.
AU - Hegt, J.A.
AU - Roermund, van, A.H.M.
PY - 2007
Y1 - 2007
N2 - This brief analytically investigates the digital-analog converter (DAC) integrated nonlinearity (INL) with respect to the accuracy of the DAC unit elements. The main novelty of the presented approach is in the application of the Brownian Bridge (BB) process to precisely describe the INL. This method analyzes the thermometer and binary DAC architectures and is the first to prove that their statistical INL properties are different. The INL of the thermometer DAC is represented as a one-dimensional BB process. For the binary case, the INL is represented as combinations of random variables, the increments of which coincide with a BB process. For both architectures, this brief derives formulas for the INL main statistical properties, e.g., probability density function, mean, deviation, and chip yield. These properties are compared with previous analytical attempts and conclusions are drawn. The results of this brief fill a gap in the general understanding of the most quoted DAC specification- the INL. In particular, for a high-volume chip production, the derived formulas will help engineers to choose the DAC architecture and the allowed mismatch of the DAC unit elements
AB - This brief analytically investigates the digital-analog converter (DAC) integrated nonlinearity (INL) with respect to the accuracy of the DAC unit elements. The main novelty of the presented approach is in the application of the Brownian Bridge (BB) process to precisely describe the INL. This method analyzes the thermometer and binary DAC architectures and is the first to prove that their statistical INL properties are different. The INL of the thermometer DAC is represented as a one-dimensional BB process. For the binary case, the INL is represented as combinations of random variables, the increments of which coincide with a BB process. For both architectures, this brief derives formulas for the INL main statistical properties, e.g., probability density function, mean, deviation, and chip yield. These properties are compared with previous analytical attempts and conclusions are drawn. The results of this brief fill a gap in the general understanding of the most quoted DAC specification- the INL. In particular, for a high-volume chip production, the derived formulas will help engineers to choose the DAC architecture and the allowed mismatch of the DAC unit elements
U2 - 10.1109/TCSII.2006.886900
DO - 10.1109/TCSII.2006.886900
M3 - Article
SN - 1549-7747
VL - 54
SP - 146
EP - 150
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
IS - 2
ER -