Bridging more than 100um step by thick photoresist slope for 3D chip integration

P. Duan, O. Raz, E. Smalbrugge, E.J. Geluk, T. Vries, de, H.J.S. Dorren

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Abstract

Interconnect density is gradually becoming a serious problem in computer systems. Three-dimensional(3D) device stacking is a promising approach to increase density and scalability. We propose a new way to bridge big steps between two stacked chips when Through-Silicon-Via(TSV) is not applicable. Our approach uses an ultra-thick photoresist layer to realize a smooth slope between two different height surfaces (such as 150 µm). The key processes developed are multilayer spinning and photoresist reflow. The step height is covered by electrical-plating for metallization and connection. Compared with wire bonding, this new strategy is fabricated on wafer scale and smaller inductance is introduced.
Original languageEnglish
Title of host publicationProceedings of the 16th Annual symposium of the IEEE Photonics Benelux Chapter, 01-02 December 2011, Ghent, Belgium
Place of PublicationGhent, Belgium
PublisherUniversiteit Gent
Pages201-204
ISBN (Print)978-90-85784-67-8
Publication statusPublished - 2011
Event16th Annual Symposium of the IEEE Photonics Benelux Chapter - Ghent, Belgium
Duration: 1 Dec 20112 Dec 2011
Conference number: 16
http://www.photonics-benelux.org/symp11/

Conference

Conference16th Annual Symposium of the IEEE Photonics Benelux Chapter
Country/TerritoryBelgium
CityGhent
Period1/12/112/12/11
Internet address

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