Body bias aware digital design : a design strategy for area- and performance-efficient CMOS integrated circuits

R.I.M.P. Meijer

Research output: ThesisPhd Thesis 2 (Research NOT TU/e / Graduation TU/e)Academic

LanguageEnglish
QualificationDoctor of Philosophy
Awarding Institution
  • Department of Electrical Engineering
Supervisors/Advisors
  • Pineda de Gyvez, Jose, Promotor
  • Otten, Ralph, Promotor
Award date1 Jan 2011
Place of PublicationEindhoven
Publisher
Print ISBNs978-90-386-2920-9
DOIs
StatePublished - 2011

Cite this

Meijer, R.I.M.P.. / Body bias aware digital design : a design strategy for area- and performance-efficient CMOS integrated circuits. Eindhoven : Technische Universiteit Eindhoven, 2011. 147 p.
@phdthesis{ee8aa4cfced6474e8a6aa4a36e074f5a,
title = "Body bias aware digital design : a design strategy for area- and performance-efficient CMOS integrated circuits",
author = "R.I.M.P. Meijer",
year = "2011",
doi = "10.6100/IR719493",
language = "English",
isbn = "978-90-386-2920-9",
publisher = "Technische Universiteit Eindhoven",
school = "Department of Electrical Engineering",

}

Meijer, RIMP 2011, 'Body bias aware digital design : a design strategy for area- and performance-efficient CMOS integrated circuits', Doctor of Philosophy, Department of Electrical Engineering, Eindhoven. DOI: 10.6100/IR719493

Body bias aware digital design : a design strategy for area- and performance-efficient CMOS integrated circuits. / Meijer, R.I.M.P.

Eindhoven : Technische Universiteit Eindhoven, 2011. 147 p.

Research output: ThesisPhd Thesis 2 (Research NOT TU/e / Graduation TU/e)Academic

TY - THES

T1 - Body bias aware digital design : a design strategy for area- and performance-efficient CMOS integrated circuits

AU - Meijer,R.I.M.P.

PY - 2011

Y1 - 2011

U2 - 10.6100/IR719493

DO - 10.6100/IR719493

M3 - Phd Thesis 2 (Research NOT TU/e / Graduation TU/e)

SN - 978-90-386-2920-9

PB - Technische Universiteit Eindhoven

CY - Eindhoven

ER -

Meijer RIMP. Body bias aware digital design : a design strategy for area- and performance-efficient CMOS integrated circuits. Eindhoven: Technische Universiteit Eindhoven, 2011. 147 p. Available from, DOI: 10.6100/IR719493