Beware the isochronic fork

Networks of so-called VLSI operators connected by wires form an attractive abstraction of the VLSI medium. However, for the design of non-trivial delay-insensitive circuits so-called isochronic forks are essential. When not carefully implemented, these isochronic forks may give rise to hazardous behavior. Three experiments are used to demonstrate that these forks can be very treacherous by producing hazards in circuits that seem innocent. To avoid such hazards, transition times must be bounded. It is shown that it is also important to limit the variation in logic threshold voltages of VLSI operators. An approach called uniform logic threshold voltages (or "uniform thresholds" for short) is proposed and elaborated on operators. It is also shown that a particular CMOS implementation of sequential operators is not capable of producing uniform thresholds. An alternative implementation is presented for these operators. The idea of uniform thresholds is illustrated by numerous examples.