Abstract
A method of generating digital test patterns for testing a number of wiring interconnects is described. A first set of test patterns is generated; the number of test patterns in the first set is related to said number of wiring interconnects, and defines a first set of code words. From the first set of code words, a second set of code words is selected. The number of code words in the second set is equal to said number of wiring interconnects, and the selection of the second set of code words is such that the sum of the transition counts for the code words in the second set is minimized.
| Original language | English |
|---|---|
| Patent number | US2006259835 |
| IPC | G01R 31/ 3183 A I |
| Priority date | 19/05/04 |
| Publication status | Published - 16 Nov 2006 |
| Externally published | Yes |