Automatic partitioning for multirate methods

A. Verhoeven, B. Tasic, T.G.J. Beelen, E.J.W. Maten, ter, R.M.M. Mattheij

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

The (nonlinear) transient analysis of electrical circuit models plays an important role in circuit design. Multirate time integration can be able to achieve the same accuracy for much lower costs. An essential assumption is the existence of a good partition of the circuit in a slow and fast part. This paper describes how this can be done automatically.
Original languageEnglish
Title of host publicationProceedings of the 6th International Conference on Scientific Computing in Electrical Engineering (SCEE 2006) 17-22 September 2006, Sinaia, Romania
EditorsG. Ciuprina, D. Ioan
Place of PublicationBerlin
PublisherSpringer
Pages229-236
ISBN (Print)978-3-540-71979-3
DOIs
Publication statusPublished - 2007
EventScientific Computing in Electrical Engineering, SCEE 2006 - Sinaia, Romania
Duration: 17 Sept 200622 Sept 2006
https://scee-conferences.org/

Publication series

NameMathematics in Industry
Volume11
ISSN (Print)1612-3956

Conference

ConferenceScientific Computing in Electrical Engineering, SCEE 2006
Abbreviated titleSCEE 2006
Country/TerritoryRomania
CitySinaia
Period17/09/0622/09/06
OtherSCEE 2006, Sinaia, Romania
Internet address

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