Automatic Control Synthesis with Temporal Logic Requirements: Stochastic, Uncertain, and Nonlinear Systems

Research output: ThesisPhd Thesis 1 (Research TU/e / Graduation TU/e)

96 Downloads (Pure)
Original languageEnglish
QualificationDoctor of Philosophy
Awarding Institution
  • Electrical Engineering
Supervisors/Advisors
  • Weiland, Siep, Promotor
  • Haesaert, Sofie, Copromotor
Award date10 Nov 2023
Place of PublicationEindhoven
Publisher
Print ISBNs978-90-386-5864-3
Publication statusPublished - 10 Nov 2023

Bibliographical note

Proefschrift.

Cite this