Automatic control flow generation for openVX graphs

Merten Popp, Stef van Son, Orlando Moreira

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

1 Citation (Scopus)

Abstract

Heterogeneous platforms with large numbers of processing elements (PEs) have been proposed to satisfy the computational requirements of computer vision applications. Limiting the incurred communication cost here is key to meet the power constraints of embedded devices. We present a new heuristic to reduce communication among PEs and to external memory by aggregating inter-process communication and pipelining image processing functions. The application is specified as an OpenVX graph, an industry standard for vision applications, though our method is applicable to dataflow in general. We use dataflow and graph-based analysis techniques to map the application at configuration time to a hardware platform with strong program memory constraints. We show that our approach can yield a reduction of up to 53% in communication compared to other OpenVX implementations.

Original languageEnglish
Title of host publicationProceedings - 20th Euromicro Conference on Digital System Design, DSD 2017
EditorsMartin Novotny, Hana Kubatova, Amund Skavhaug
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages198-204
Number of pages7
ISBN (Electronic) 978-1-5386-2146-2
ISBN (Print) 978-1-5386-2147-9
DOIs
Publication statusPublished - 25 Sep 2017
Event20th Euromicro Conference on Digital System Design (DSD 2017) - Vienna, Austria
Duration: 30 Aug 20171 Sep 2017
Conference number: 20

Conference

Conference20th Euromicro Conference on Digital System Design (DSD 2017)
Abbreviated titleDSD 2017
Country/TerritoryAustria
CityVienna
Period30/08/171/09/17

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