Automatic and Optimized Hardware Sequence Generation and Inline Interpretation: The design and implementation of tools for reducing the development and deployment efforts of YieldStar’s hardware action-scheduling software

Georgios Evangelou

Automatic and Optimized Hardware Sequence Generation and Inline Interpretation: The design and implementation of tools for reducing the development and deployment efforts of YieldStar’s hardware action-scheduling software

Georgios Evangelou

Research output: Thesis › EngD Thesis

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Original language	English
Supervisors/Advisors	van den Elzen, Stef, Supervisor Sheng, Zhifeng, External supervisor, External person
Place of Publication	Eindhoven
Publisher	Technische Universiteit Eindhoven
Publication status	Published - 13 Oct 2023

Bibliographical note

EngD thesis.

Access to Document

2023-10-23_ST_Evangelou_GFinal published version, 3.51 MB

Cite this

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title = "Automatic and Optimized Hardware Sequence Generation and Inline Interpretation: The design and implementation of tools for reducing the development and deployment efforts of YieldStar{\textquoteright}s hardware action-scheduling software",

author = "Georgios Evangelou",

note = "EngD thesis.",

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month = oct,

day = "13",

language = "English",

series = "EngD Thesis",

publisher = "Technische Universiteit Eindhoven",

type = "EngD Thesis",

}

TY - THES

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AU - Evangelou, Georgios

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PY - 2023/10/13

Y1 - 2023/10/13

M3 - EngD Thesis

T3 - EngD Thesis

PB - Technische Universiteit Eindhoven

CY - Eindhoven

ER -