Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology

Jaehyun Lee; Jie Liang; Salvatore M. Amoroso; Toufik Sadi; Liping Wang; Flamen Asenov; Andrew Pender; Dave T. Reid; Vihar P. Georgiev; Campbell Millar; Aida Todri-Sanial; Asen Asenov

doi:10.23919/SISPAD.2017.8085287

Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology

Jaehyun Lee
, Jie Liang
, Salvatore M. Amoroso
, Toufik Sadi
, Liping Wang
, Flamen Asenov
, Andrew Pender
, Dave T. Reid
, Vihar P. Georgiev
, Campbell Millar
, Aida Todri-Sanial
, Asen Asenov

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

3 Citations (Scopus)

Abstract

In this study, we suggest a hierarchical model to investigate the electrical performance of carbon nanotube (CNT)-based interconnects. From the density functional theory, we have obtained important physical parameters, which are used in TCAD simulators to obtain the RC netlists. We then use these RC netlists for the circuit-level simulations to optimize interconnect design in VLSI. Also, we have compared various CNT-based interconnects such as single-walled CNTs, multi-walled CNTs, doped CNTs, and Cu-CNT composites in terms of conductivity, ring oscillator delay, and propagation time delay.

Original language	English
Title of host publication	2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017
Publisher	Institute of Electrical and Electronics Engineers
Pages	153-156
Number of pages	4
ISBN (Electronic)	9784863486102
DOIs	https://doi.org/10.23919/SISPAD.2017.8085287
Publication status	Published - 25 Oct 2017
Externally published	Yes
Event	2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017 - Kamakura, Japan Duration: 7 Sept 2017 → 9 Sept 2017

Conference

Conference	2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017
Country/Territory	Japan
City	Kamakura
Period	7/09/17 → 9/09/17

Bibliographical note

Funding Information:
IV. CONCLUSIONS We have presented a multiscale simulation flow to allow the design-technology co-optimization of CNT-based interconnect technologies. We have benchmarked CNT performances vs. Cu. We have demonstrated the impact of iodine doping and Cu-CNT composites on CNT interconnects performance ACKNOWLEDGMENT This work is supported by EU H2020 CONNECT project under grant agreement No. 688612, http://www.connecth2020.eu/.

Publisher Copyright:
© 2017 The Japan Society of Applied Physics.

Funding

IV. CONCLUSIONS We have presented a multiscale simulation flow to allow the design-technology co-optimization of CNT-based interconnect technologies. We have benchmarked CNT performances vs. Cu. We have demonstrated the impact of iodine doping and Cu-CNT composites on CNT interconnects performance ACKNOWLEDGMENT This work is supported by EU H2020 CONNECT project under grant agreement No. 688612, http://www.connecth2020.eu/.

Keywords

carbon nanotubes (CNTs)
circuit simulation
Cu-CNT composites
Density Functional Theory (DFT)
hierarchical models
interconnects

Access to Document

10.23919/SISPAD.2017.8085287

Cite this

Lee, J., Liang, J., Amoroso, S. M., Sadi, T., Wang, L., Asenov, F., Pender, A., Reid, D. T., Georgiev, V. P., Millar, C., Todri-Sanial, A., & Asenov, A. (2017). Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology. In 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017 (pp. 153-156). Article 8085287 Institute of Electrical and Electronics Engineers. https://doi.org/10.23919/SISPAD.2017.8085287

@inproceedings{8139dfb196484bbe9ca3397354d8ac27,

title = "Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology",

abstract = "In this study, we suggest a hierarchical model to investigate the electrical performance of carbon nanotube (CNT)-based interconnects. From the density functional theory, we have obtained important physical parameters, which are used in TCAD simulators to obtain the RC netlists. We then use these RC netlists for the circuit-level simulations to optimize interconnect design in VLSI. Also, we have compared various CNT-based interconnects such as single-walled CNTs, multi-walled CNTs, doped CNTs, and Cu-CNT composites in terms of conductivity, ring oscillator delay, and propagation time delay.",

keywords = "carbon nanotubes (CNTs), circuit simulation, Cu-CNT composites, Density Functional Theory (DFT), hierarchical models, interconnects",

author = "Jaehyun Lee and Jie Liang and Amoroso, \{Salvatore M.\} and Toufik Sadi and Liping Wang and Flamen Asenov and Andrew Pender and Reid, \{Dave T.\} and Georgiev, \{Vihar P.\} and Campbell Millar and Aida Todri-Sanial and Asen Asenov",

note = "Funding Information: IV. CONCLUSIONS We have presented a multiscale simulation flow to allow the design-technology co-optimization of CNT-based interconnect technologies. We have benchmarked CNT performances vs. Cu. We have demonstrated the impact of iodine doping and Cu-CNT composites on CNT interconnects performance ACKNOWLEDGMENT This work is supported by EU H2020 CONNECT project under grant agreement No. 688612, http://www.connecth2020.eu/. Publisher Copyright: {\textcopyright} 2017 The Japan Society of Applied Physics.; 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017 ; Conference date: 07-09-2017 Through 09-09-2017",

year = "2017",

month = oct,

day = "25",

doi = "10.23919/SISPAD.2017.8085287",

language = "English",

pages = "153--156",

booktitle = "2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Lee, J, Liang, J, Amoroso, SM, Sadi, T, Wang, L, Asenov, F, Pender, A, Reid, DT, Georgiev, VP, Millar, C, Todri-Sanial, A & Asenov, A 2017, Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology. in 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017., 8085287, Institute of Electrical and Electronics Engineers, pp. 153-156, 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017, Kamakura, Japan, 7/09/17. https://doi.org/10.23919/SISPAD.2017.8085287

Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology. / Lee, Jaehyun; Liang, Jie; Amoroso, Salvatore M. et al.
2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017. Institute of Electrical and Electronics Engineers, 2017. p. 153-156 8085287.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology

AU - Lee, Jaehyun

AU - Liang, Jie

AU - Amoroso, Salvatore M.

AU - Sadi, Toufik

AU - Wang, Liping

AU - Asenov, Flamen

AU - Pender, Andrew

AU - Reid, Dave T.

AU - Georgiev, Vihar P.

AU - Millar, Campbell

AU - Todri-Sanial, Aida

AU - Asenov, Asen

N1 - Funding Information: IV. CONCLUSIONS We have presented a multiscale simulation flow to allow the design-technology co-optimization of CNT-based interconnect technologies. We have benchmarked CNT performances vs. Cu. We have demonstrated the impact of iodine doping and Cu-CNT composites on CNT interconnects performance ACKNOWLEDGMENT This work is supported by EU H2020 CONNECT project under grant agreement No. 688612, http://www.connecth2020.eu/. Publisher Copyright: © 2017 The Japan Society of Applied Physics.

PY - 2017/10/25

Y1 - 2017/10/25

N2 - In this study, we suggest a hierarchical model to investigate the electrical performance of carbon nanotube (CNT)-based interconnects. From the density functional theory, we have obtained important physical parameters, which are used in TCAD simulators to obtain the RC netlists. We then use these RC netlists for the circuit-level simulations to optimize interconnect design in VLSI. Also, we have compared various CNT-based interconnects such as single-walled CNTs, multi-walled CNTs, doped CNTs, and Cu-CNT composites in terms of conductivity, ring oscillator delay, and propagation time delay.

AB - In this study, we suggest a hierarchical model to investigate the electrical performance of carbon nanotube (CNT)-based interconnects. From the density functional theory, we have obtained important physical parameters, which are used in TCAD simulators to obtain the RC netlists. We then use these RC netlists for the circuit-level simulations to optimize interconnect design in VLSI. Also, we have compared various CNT-based interconnects such as single-walled CNTs, multi-walled CNTs, doped CNTs, and Cu-CNT composites in terms of conductivity, ring oscillator delay, and propagation time delay.

KW - carbon nanotubes (CNTs)

KW - circuit simulation

KW - Cu-CNT composites

KW - Density Functional Theory (DFT)

KW - hierarchical models

KW - interconnects

UR - https://www.scopus.com/pages/publications/85039058243

U2 - 10.23919/SISPAD.2017.8085287

DO - 10.23919/SISPAD.2017.8085287

M3 - Conference contribution

AN - SCOPUS:85039058243

SP - 153

EP - 156

BT - 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017

PB - Institute of Electrical and Electronics Engineers

T2 - 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017

Y2 - 7 September 2017 through 9 September 2017

ER -

Lee J, Liang J, Amoroso SM, Sadi T, Wang L, Asenov F et al. Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology. In 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017. Institute of Electrical and Electronics Engineers. 2017. p. 153-156. 8085287 doi: 10.23919/SISPAD.2017.8085287

Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology

Abstract

Conference

Bibliographical note

Funding

Keywords

Access to Document

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Cite this