Asynchronous digital slope analog-to-digital converter and method thereof

P.J.A. Harpe (Inventor)

Research output: PatentPatent publication

Abstract

The present invention is related to an analog to digital converter circuit (1). The converter circuit comprises at least one input node (2) for applying an analog input voltage signal (V in ), sampling means (3) for sampling said analog input voltage signal, a first array of capacitors (5) arranged for receiving the sampled analog input voltage signal (4), a digital delay line (6) connected to the first array of capacitors (5) and arranged for being enabled by a clock generator (7) and for generating a staircase or slope function by means of the first capacitor array, taking into account the sampled analog input voltage signal, a comparator (8) arranged for comparing a converted signal (9) with a reference voltage (V ref ), said converted signal being a version of said sampled analog input voltage (4) converted according to said staircase or slope function, and for generating a stop signal (10) based on the comparison result thereby latching the digital delay line and thereby acquiring the digital code.
Original languageEnglish
Patent numberEP2388923
Priority date21/05/10
Publication statusPublished - 23 Nov 2011

Bibliographical note

Also published as:
US2011285568 (A1)

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