Architecture and design flow for a debug event distribution interconnect.

A. Azevedo; H.G.H. Vermeulen; K.G.W. Goossens

doi:10.1109/ICCD.2012.6378676

Architecture and design flow for a debug event distribution interconnect.

A. Azevedo, H.G.H. Vermeulen, K.G.W. Goossens

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

Abstract

In this paper, we describe and analyze the architecture of the proposed Debug Event Distribution Interconnect (EDI). The EDI transmits debug events, which are 1-bit signals, between debug entities in different areas of the Network-on-Chip based Multi-Processor System-on-Chip. The EDI replicates the NoC topology with an EDI node instantiated for each underlying NoC data module. Contention in the EDI node is handled by replicating the EDI in layers. The EDI generation is automatic, and uses as input the cross-triggering patterns that are not required to follow the communication patterns in the NoC. The generation and routing tool is also presented in this paper. The EDI is evaluated with four different implementations varying complexity and handling of contention. The area of a single EDI Layer is around 0.9% of the area occupied by the tested NoCs, using the lower area implementation. These results show that the proposed implementation of the EDI incurs low cost on the overall system.

Original language	English
Title of host publication	Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD), 30 September - 2 October 2012, Montreal, Quebec
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	439-444
DOIs	https://doi.org/10.1109/ICCD.2012.6378676
Publication status	Published - 2012
Event	30th IEEE International Conference on Computer Design (ICCD 2012) - Montreal, Canada Duration: 30 Sept 2012 → 3 Oct 2012 Conference number: 30 http://www.iccd-conf.com/2012/

Conference

Conference	30th IEEE International Conference on Computer Design (ICCD 2012)
Abbreviated title	ICCD 2012
Country/Territory	Canada
City	Montreal
Period	30/09/12 → 3/10/12
Internet address	http://www.iccd-conf.com/2012/

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10.1109/ICCD.2012.6378676

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Azevedo, A., Vermeulen, H. G. H., & Goossens, K. G. W. (2012). Architecture and design flow for a debug event distribution interconnect. In Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD), 30 September - 2 October 2012, Montreal, Quebec (pp. 439-444). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ICCD.2012.6378676

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title = "Architecture and design flow for a debug event distribution interconnect.",

abstract = "In this paper, we describe and analyze the architecture of the proposed Debug Event Distribution Interconnect (EDI). The EDI transmits debug events, which are 1-bit signals, between debug entities in different areas of the Network-on-Chip based Multi-Processor System-on-Chip. The EDI replicates the NoC topology with an EDI node instantiated for each underlying NoC data module. Contention in the EDI node is handled by replicating the EDI in layers. The EDI generation is automatic, and uses as input the cross-triggering patterns that are not required to follow the communication patterns in the NoC. The generation and routing tool is also presented in this paper. The EDI is evaluated with four different implementations varying complexity and handling of contention. The area of a single EDI Layer is around 0.9% of the area occupied by the tested NoCs, using the lower area implementation. These results show that the proposed implementation of the EDI incurs low cost on the overall system.",

author = "A. Azevedo and H.G.H. Vermeulen and K.G.W. Goossens",

year = "2012",

doi = "10.1109/ICCD.2012.6378676",

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publisher = "Institute of Electrical and Electronics Engineers",

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note = "30th IEEE International Conference on Computer Design (ICCD 2012), ICCD 2012 ; Conference date: 30-09-2012 Through 03-10-2012",

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Azevedo, A, Vermeulen, HGH & Goossens, KGW 2012, Architecture and design flow for a debug event distribution interconnect. in Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD), 30 September - 2 October 2012, Montreal, Quebec. Institute of Electrical and Electronics Engineers, Piscataway, pp. 439-444, 30th IEEE International Conference on Computer Design (ICCD 2012), Montreal, Canada, 30/09/12. https://doi.org/10.1109/ICCD.2012.6378676

Architecture and design flow for a debug event distribution interconnect. / Azevedo, A.; Vermeulen, H.G.H.; Goossens, K.G.W.

Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD), 30 September - 2 October 2012, Montreal, Quebec. Piscataway : Institute of Electrical and Electronics Engineers, 2012. p. 439-444.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AB - In this paper, we describe and analyze the architecture of the proposed Debug Event Distribution Interconnect (EDI). The EDI transmits debug events, which are 1-bit signals, between debug entities in different areas of the Network-on-Chip based Multi-Processor System-on-Chip. The EDI replicates the NoC topology with an EDI node instantiated for each underlying NoC data module. Contention in the EDI node is handled by replicating the EDI in layers. The EDI generation is automatic, and uses as input the cross-triggering patterns that are not required to follow the communication patterns in the NoC. The generation and routing tool is also presented in this paper. The EDI is evaluated with four different implementations varying complexity and handling of contention. The area of a single EDI Layer is around 0.9% of the area occupied by the tested NoCs, using the lower area implementation. These results show that the proposed implementation of the EDI incurs low cost on the overall system.

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BT - Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD), 30 September - 2 October 2012, Montreal, Quebec

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Architecture and design flow for a debug event distribution interconnect.

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