Abstract
The sampling nature of the phase-frequency detector (PFD) degrades the stability of the charge-pump phase-locked loop (CPPLL). This paper analyzes the effect of the PFD sampling on the CPPLL stability by using z-transform. The PFD is modeled as a zero-order hold to perform the z-domain analysis. The stability boundary predicted by the analysis is accurate and verified by simulations using Cadence Spectre. In addition, a physical interpretation of how sampling destabilizes an otherwise stable continuous feedback system is provided in time domain, which brings valuable insight into the operation of sampled feedback systems like CPPLL.
Original language | English |
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Title of host publication | 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings |
Place of Publication | Piscataway |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 1-5 |
Number of pages | 5 |
ISBN (Electronic) | 978-1-5386-4881-0 |
ISBN (Print) | 978-1-5386-4882-7 |
DOIs | |
Publication status | Published - 26 Apr 2018 |
Event | 2018 IEEE International Symposium on Circuits and Systems (ISCAS 2018) - Florence Conference Center, Florence, Italy Duration: 27 May 2018 → 30 May 2018 https://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8334884 |
Conference
Conference | 2018 IEEE International Symposium on Circuits and Systems (ISCAS 2018) |
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Abbreviated title | ISCAS 2018 |
Country/Territory | Italy |
City | Florence |
Period | 27/05/18 → 30/05/18 |
Internet address |
Funding
ACKNOWLEDGMENT We would like to sincerely thank STW financial assistance to our project.
Keywords
- Phase-frequency detector
- phase-locked loop
- sampling
- zero-order hold