Analog design automation : topology selection and piecewise linear model generation

P. Veselinovic

Research output: Thesis › Phd Thesis 1 (Research TU/e / Graduation TU/e)

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Original language	English
Qualification	Doctor of Philosophy
Awarding Institution	Electrical Engineering
Supervisors/Advisors	van Bokhoven, Wim, Promotor Jess, Jochen, Promotor Leenaerts, Domine, Copromotor
Award date	16 Jun 1997
Place of Publication	Eindhoven
Publisher	Technische Universiteit Eindhoven
Print ISBNs	90-386-0330-4
DOIs	https://doi.org/10.6100/IR493927
Publication status	Published - 1997

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@phdthesis{f7783b73e50a47d28a9b478455dd4862,

title = "Analog design automation : topology selection and piecewise linear model generation",

author = "P. Veselinovic",

year = "1997",

doi = "10.6100/IR493927",

language = "English",

isbn = "90-386-0330-4",

publisher = "Technische Universiteit Eindhoven",

type = "Phd Thesis 1 (Research TU/e / Graduation TU/e)",

school = "Electrical Engineering",

}