Analog design automation : topology selection and piecewise linear model generation

P. Veselinovic

Research output: ThesisPhd Thesis 1 (Research TU/e / Graduation TU/e)

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Original languageEnglish
QualificationDoctor of Philosophy
Awarding Institution
  • Department of Electrical Engineering
Supervisors/Advisors
  • van Bokhoven, Wim, Promotor
  • Jess, Jochen, Promotor
  • Leenaerts, Domine M.W., Copromotor
Award date16 Jun 1997
Place of PublicationEindhoven
Publisher
Print ISBNs90-386-0330-4
DOIs
Publication statusPublished - 1997

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