This paper presents a method for the on-chip measurement and correction of gain errors, offsets and nonlinearities of a Track-and-Hold circuit (T&H) of an ADC. Openloop T&H circuits will be considered in this paper because of their high-speed and low-power capabilities. However, these open-loop circuits require calibration for the aforementioned errors in order to achieve a high accuracy, especially in case of time-interleaved architectures. With the proposed method, the errors can be measured and digitized on-chip accurately, without requiring a substantial amount of hardware or any accurate references. Then, this information is used by a digitally implemented algorithm to optimize several digitally controlled analog parameters of the circuit. In turn, these parameters minimize the effect of mismatch errors. After optimization, the digital logic can be switched off completely in order to save power.
|Title of host publication||Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA|
|Publication status||Published - 2007|
|Event||2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007) - New Orleans, United States|
Duration: 27 May 2007 → 30 May 2007
|Conference||2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007)|
|Abbreviated title||ISCAS 2007|
|Period||27/05/07 → 30/05/07|