An improved physics-based LTSpice compact electro-thermal model for a SiC power MOSFET with experimental validation

Md Maksudul Hossain, Lorenzo Ceccarelli, Arman Ur Rashid, Ramchandra M. Kotecha, H. Alan Mantooth

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

5 Citations (Scopus)

Abstract

A compact electro-thermal SiC Power MOSFET model implemented in LTSpice is presented in this paper. A 1200 V, 90A CREE SiC power MOSFET (C2M0025120D) has been used in this work to illustrate the parameter extraction and experimental model validation. The dynamic validation has been shown using a double-pulse test circuit. The convergence has been tested with the 4-switch topology of an inverter and a comparison between MAST, Verilog-A and CREE's empirical model of the same device has also been presented.

Original languageEnglish
Title of host publicationIECON 2018
Subtitle of host publication44th Annual Conference of the IEEE Industrial Electronics Society
PublisherInstitute of Electrical and Electronics Engineers
Pages1011-1016
Number of pages6
ISBN (Electronic)978-1-5090-6684-1
ISBN (Print)978-1-5090-6685-8
DOIs
Publication statusPublished - 26 Dec 2018
Externally publishedYes
Event44th Annual Conference of the IEEE Industrial Electronics Society (IECON 2018) - Washington, United States
Duration: 21 Oct 201823 Oct 2018
Conference number: 44
http://www.iecon2018.org/

Conference

Conference44th Annual Conference of the IEEE Industrial Electronics Society (IECON 2018)
Abbreviated titleIECON
Country/TerritoryUnited States
CityWashington
Period21/10/1823/10/18
Internet address

Keywords

  • Compact model
  • Electro-thermal model
  • LTSpice
  • Saber
  • SiC MOSFET

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