An FPGA bridge preserving traffing quality of service for on-chip network-based systems

A.B. Nejad, M. Escudero Martinez, K.G.W. Goossens

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

FPGA prototyping of recent large Systems on Chip (SoCs) is very challenging due to the resource limitation of a single FPGA. Moreover, having external access to SoCs for verification and debug purposes is essential. In this paper, we suggest to partition a network-on-chip (NoC) based system into smaller sub-systems each with their own NoC, and each of which is implemented on a separate FPGA board. Multiple SoC ASICs can be bridged in the same way. The scheme that interconnects the sub-systems should offer the application connections the required quality of service (QoS). In this paper, we investigate bridging schemes at different levels of the NoC protocol stack. Comparing the distinct design criteria for the proposed schemes, a bridge is designed. The bridge experiments show that it provides QoS in terms of bandwith and latency.
Original languageEnglish
Title of host publicationProceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE 2011), 14-18 March 2011, Grenoble, France
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages1-6
ISBN (Print)978-1-61284-208-0
Publication statusPublished - 2011
Event14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011)
- Alpexpo Espace Alpes Congres, Grenoble, France
Duration: 14 Mar 201118 Mar 2011
Conference number: 14
https://www.date-conference.com/date11/

Conference

Conference14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011)
Abbreviated titleDATE 2011
Country/TerritoryFrance
CityGrenoble
Period14/03/1118/03/11
Internet address

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