An energy-efficient quaternary serial adder for nanoelectronics

Shima Sedighiani, Arman Kazemi

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

8 Citations (Scopus)

Abstract

Increased power consumption of scaling Complementary Metal Oxide Semiconductor (CMOS) technology and the limitations of binary communication have led to the consideration of non-silicon multiple-valued logic (MVL) circuits. The unique properties of Carbon Nanotube Field Effect Transistors (CNTFETs) in circuit design, such as the capability of setting the desired threshold voltage by adjusting the CNT diameters and the ballistic transport of carriers, make it possible to achieve an effective solution to improve energy efficiency and speed. Quaternary is the closest radix to the optimum (e=2.718) that has the advantage of easy communication with binary logic circuits. This study presents an efficient design of a quaternary serial adder based on CNTFETs. The design exploits an existing high-performance full adder and improves the carry propagation. Simulation results confirm that the proposed quaternary serial adder uses on average 57.8% of the power such an adder requires based on the current state-of-The-Art quaternary full adders.

Original languageEnglish
Title of host publicationProceedings - 2018 IEEE 48th International Symposium on Multiple-Valued Logic, ISMVL 2018
Place of PublicationPiscataway
PublisherIEEE Computer Society
Pages44-49
Number of pages6
ISBN (Electronic)9781538644638
DOIs
Publication statusPublished - 19 Jul 2018
Event48th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2018 - Linz, Austria
Duration: 16 May 201818 May 2018

Conference

Conference48th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2018
Country/TerritoryAustria
CityLinz
Period16/05/1818/05/18

Keywords

  • Carbon nanotube FET
  • Multiple-Valued Logic
  • Nanoelectronics
  • Quaternary Logic

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